EE3300/EE5300 Electronics Applications

Week 1 Self-Study Notes

Modular design in electronics (the importance of input and output impedances)

Based on the reading above, answer the following question:

Self-Check Quiz 1

You are working on a modular circuit design in which the first stage is delivering a voltage signal to a second stage. Using the concept of a Thévenin equivalent circuit, we can represent this situation using the simplified layout in Figure 1.

How large must be compared to in order to achieve only a 1% loss in voltage amplitude? (Hint: you can read this off the chart in Figure 1.14 in AoE.)

(a)

must be equal to (maximum power transfer).

(b)

must be 2 times larger than .

(c)

must be 10 times larger than .

(d)

must be 100 times larger than .

(e)

must be 1000 times larger than .

Check Start again

✔️ Correct!

Formal definitions of input and output impedances

Input and output impedances are formally defined as shown in Figure 2, where

The input impedance is defined with the output disconnected (open circuit).

The output impedance is defined with the input turned off (i.e. for a voltage signal, the input is 0 V, and for a current signal, the input is 0 A). These are the same rules that you might recall from circuit theory when defining Thévenin equivalent circuits. All independent sources are turned off when analysing the impedance.

It is often not necessary to perform a full circuit analysis using these test circuits. Often the impedances can be seen by visually inspecting the circuit design and recalling the small signal models of the components.

Desired impedances for voltage or current signals

It is common to manage complexity by dividing a large problem into smaller parts. This is only possible if the smaller parts can be designed largely in isolation with well-defined interfaces between each section.

In electronics, a key characteristic of the interfaces between circuit stages are the input and output impedances. Often we require that one stage is not “loaded” by another. This means that the current or voltage (depending on which carries the signal) is not significantly affected by the connection to the next stage, i.e. that the input impedance of the next stage is appropriate given the output impedance of the previous stage.

The suitability of input and output impedances varies depending on whether the information content in a signal is being carried by voltage or current. Consider the scenarios shown in Figure 3. You can see that different scenarios require either high or low impedances at the input and output of a circuit stage.

These rules can be easily remembered by thinking about the Thévenin or Norton equivalent circuits and the impact of the impedances upon the signal.

Bipolar junction transistors (BJTs)

Current gain

The relationship between the collector current and base current is often written

where is called the “current gain” of the transistor. There is also a common approximation

A similar quantity to is , which is a notation that you might see in datasheets. The notation of (instead of ) implies the use of the h-parameter model, which also includes an output impedance that will affect . The “F” means forward current gain and “E” means that the device was tested in a common emitter configuration. Sometimes you may see (capital letters) to indicate the total (“DC”) current gain and (lower-case letters) to indicate the small-signal perturbation (“AC”) current gain. The notation without further qualification usually refers to the DC current gain.

Transistor current gain is also subject to considerable manufacturing variation. For example, the BC547A (a typical small signal npn transistor) has a datasheet that specifies that can vary between 110 and 220; for the BC547B the range is 200 to 450. These examples show how the exact value of cannot be relied upon in a circuit design.

The proper design approach for a BJT circuit is to determine the required base-emitter voltage , rather than the base current . We will introduce the required equations below.

The Ebers-Moll model

The Ebers-Moll model describes the operation of a BJT in the active mode. According to the Ebers-Moll model, the collector current is controlled by the base emitter voltage :

where is called the saturation current and is the thermal voltage (approximately 26 mV at room temperature). The saturation current depends upon the geometry of the transistor; typical values for small signal BJTs are in the vicinity of femtoamps.

The Ebers-Moll model describes a voltage-dependent current source. Notice that the base current does not appear. This model reveals that the most accurate way to understand the operation of a BJT is to think of the voltage as being the critical parameter that controls the collector current.

The model also makes the surprising claim that the collector current is independent of the collector voltage so long as we stay in the active mode. In other words, when is held constant, the transistor behaves like a current source (Figure 4). This is a useful mental model to keep in mind when thinking about the operation of BJT circuits. The transistor will “absorb” whatever voltage is necessary (within some limits) to keep the collector current constant.

Example 1

In the circuit shown in Figure 5, V, V, the transistor has A, and the temperature is K. What is the largest value of so that the transistor remains in the active region?

Solution

The thermal voltage is

Using Eq. ,

By KVL, the voltage at the collector is

For the transistor to remain in the active region, and therefore the lowest allowable value of is 0.72 V.

Note: you should always check that the transistor remains in this active region by performing an analysis similar to this one. If the transistor enters “saturation” (i.e. when the conditions of the active region are not met), then Eq. does not apply.

The Early effect

The Early effect is a non-ideality that limits the achievable gain in BJT amplifiers. To understand the Early effect, we must first consider the operational principles of a BJT, as illustrated in Figure 6.

We make the following observations for an npn device:

1. The base-emitter junction is forward biased and therefore current will flow.
2. The collector-base junction is reverse biased and therefore there exists a depletion region with a strong electric field.
3. Since the emitter is heavily doped, the flow of current from base to emitter will consist predominantly of electrons “emitted” from the emitter, as illustrated by the multiple blue arrows in Figure 6.
4. Some electrons will recombine with holes from the base electrode, but since the base region is so thin, most of them will reach the edge of the depletion region.
5. The electric field in the depletion region will rapidly sweep the electrons into the collector.

Notice that there must be a high concentration of electrons in the emitter (since it is heavily doped n-type silicon), while also there must be near-zero concentration of electrons at the edge of the depletion region because electrons there experience a strong electric field that sweeps them away. A high concentration at one side and a low concentration at the other side means that there is a gradient in electron concentration across the base. This gradient in concentration will cause a diffusion current to flow.

Therefore, diffusion is the primary conduction mechanism for electrons in the base. An important fact about diffusion is that the rate of diffusion is proportional to the gradient in concentration.

Now consider what happens if is increased. The collector-base depletion region will become wider. Therefore, the electron concentration gradient will be steeper. A steeper gradient means more diffusion current, and hence the collector current will increase.

Therefore our previous statement that does not depend upon needs to be modified. A new term appears in the equation for the collector current:

where is called the “Early voltage” and is a property of the transistor.

Transconductance

Since a BJT is a voltage-controlled current source, it is useful to examine how much the output changes for a given change in input. The transconductance is defined as

Equation gives an important insight into BJT circuit design. The transconductance is solely determined by the collector current and temperature. The collector current is the fundamental quantity which must be set in order to design a BJT circuit.

A visual illustration of transconductance is shown in Figure 7.

We can use the transconductance to understand how much the collector current will change in response to a small change in the base-emitter voltage:

Here, we use capital letter to refer to the total current and lower-case letters to refer to the small-signal perturbation. The small-signal perturbation is also called “AC analysis.” This equation is valid for small changes in and , because we implicitly assumed that the transconductance isn’t affected very much by the change in .

High gain BJT combinations

The Darlington pair

The two-transistor configuration in Figure 8 is called a Darlington pair. It functions as a single transistor with modified properties, as follows:

• Higher current gain: You will prove in tutorial questions that

  Therefore a Darlington pair may be used when switching large currents. For example, a microcontroller ( current capacity) switching a load requires but ordinary power transistors may only have . However a Darlington pair where is a power transistor would easily have the required current gain.

• Higher input impedance: Consider the small signal model of Figure 8b. Since the current source of amplifies to create a larger voltage drop on , the impact of that resistor is amplified by . Hence the input impedance looking into the base is

• Higher collector-emitter voltage in saturation: When driven into saturation (which happens when you use a transistor as a switch), the of the pair is higher than that of a single transistor. This mainly affects switching circuits because amplifier designs are not usually driven into saturation.

• Slower switching speed: The base voltage on the second transistor is only discharged via , leading to a long time constant. For this reason, resistors are often added as shown in Figure 8c.

In practice, if the intent is to simply switch a large current, then you are probably better off with a MOSFET or a MOSFET-based solid state relay. Modern power MOSFETs have low threshold voltages and can be switched directly by digital logic. However, Darlington pairs are useful for amplifiers driving a signal into a load (as opposed to just turning it on or off).

The Sziklai pair (complimentary Darlington)

The Sziklai pair (Figure 9) is a combination of a pnp and npn transistor. It is similar to the Darlington pair. An advantage of the Sziklai configuration compared to the Darlington is that there is only one drop (instead of two).

A resistor () is often added across the base-emitter junction of the output transistor to improve the switching speed.

Field effect transistors (FETs)

Linear and saturation regions

JFETs and MOSFETs both have two important regions of operation. Consider first the n-channel devices shown in Figure 10.

When the drain-source voltage is low, the device is said to be in the linear region. Once the drain-source voltage becomes large enough, the device is said to be in the saturation region. In the saturation region, the drain current becomes nearly independent of . In this region, the device behaves like a current source with its current controlled by the gate voltage.

The boundary between the linear and saturation regions occurs when , where is the threshold voltage. The threshold voltage is a device property that defines the gate-source voltage at which the device begins to conduct.

The equivalent diagram for p-channel FETs is shown in Figure 11. Notice that the polarities are reversed.

Most of the time, we will design circuits to operate in the saturation region where is independent of . This is directly analogous to the active region in BJTs. It is unfortunate that the term “saturation” has opposite meanings for BJTs and MOSFETs.

Threshold voltage and turn on characteristics

We can unify our understanding of depletion and enhancement mode devices by studying Figure 12. The plot shows the magnitude of drain current as a function of gate-source voltage , with large enough for the devices to be in saturation. Notice that the difference between depletion and enhancement modes is merely a shift along the axis.

This figure also shows some important terminology.

• is the drain current when the gate-source voltage is zero. The notation “SS” stands for the gate being “shorted to source”.
• The threshold voltage is the gate-source voltage at which the current drops essentially to zero. For JFETs, the threshold is also called or (for pinch-off voltage).

FET device equations

The drain current in a JFET or MOSFET is given by

For p-channel devices, insert a minus sign so that is negative. The prefactor is a device parameter that depends upon the geometry of the device. For MOSFETs, is given by

where is the mobility of electrons in the channel, is the capacitance per unit area of the gate-substrate interface (), and are the width and length of the channel.

For JFETs and depletion mode MOSFETs, Eq. can be rearranged into the form

where is the drain current when and is another notation for the threshold voltage. Refer to Figure 12 for definitions of and .

Channel length modulation

Channel length modulation is akin to the Early effect in BJTs; it makes the drain current slightly dependent upon .

We can account for channel length modulation by modifying Eq. to include an extra term:

where is called the “channel length modulation coefficient” with units of The channel length modulation coefficient is a device parameter that depends upon the geometry of the device.

Variable resistor approximation

A MOSFET can approximate a variable resistor when is low. From Eq. , in the linear region, for we can write

Notice that this is a linear current-voltage relationship, which implies that the source-drain connection can be modelled as a resistor having a resistance

Impedance rules for transistors

Recognising when a circuit will present a high or low impedance is important for your ability to analyse the function when presented with an unfamiliar circuit schematic. There are some general rules that apply to transistor circuits, as shown in Figure 14.

The parameters for BJTs are defined as follows:

The parameters for MOSFETs are defined as follows:

It is instructive to consider which of these impedances are relatively large and small.

Current mirrors

A current mirror is a way to implement a current source. The basic layout is shown in Figure 15a. You will analyse this circuit in tutorial questions and prove that

The idea of the proof is to use the Ebers-Moll model to show that equal base-emitter voltages will result in equal collector currents, assuming that the transistors have identical characteristics.

The mirror effect only works if the two transistors have identical properties and are at the same temperature. If the transistors have similar properties then they are said to be a matched pair. You can buy matched pairs as discrete components, where both transistors are manufactured on the same die.

The current mirror is the predominant biasing technique used in integrated circuits. In an integrated circuit, the reference current may be generated using a circuit called a bandgap reference. In discrete implementations, a simple approach is to use a resistor, as shown in Figure 15b.

Differential pairs

Differential signals

So far, we have generally studied “single-ended” signals, which are carried by one wire, and are usually referenced to ground.

An alternative, which occurs frequently in modern electronics, is a “differential signal.” Differential signals are those which are carried by two wires, and are referenced to each other.

Two voltage signals and form a differential signal if they vary by equal and opposite amounts and have the same average DC level:

Here is called the common mode voltage. For any arbitrary signals, the common mode voltage is defined to be the average of the two signals. Conversely, the difference between the signals () is called the differential mode.

Figure 16 shows the difference between single ended and differential signals. Even though a differential signal uses two wires, it should be considered as just one signal. There is only one useful degree of freedom because of the constraint that . The common mode voltage is not considered to carry information.

Differential signals are ubiquitous in high speed wired communication systems (e.g. Ethernet, USB, Thunderbolt, etc). In these systems, signals are sent over pairs of wire, because noise predominantly affects the common mode. Therefore in the subtraction , most of the noise cancels out.

How can we build electronic circuits that handle differential signals? A basic building block is the differential pair.

The BJT differential pair

Figure 17 shows a bipolar differential pair. This circuit resembles two back-to-back common emitter amplifiers, except with the constraint that the sum of their currents is fixed. By KCL,

We call the “tail current source.” It provides a well-defined bias current. The tail current source also dynamically adjusts the voltage of the emitters to be below the common-mode voltage of the inputs, so that the transistors will be turned on. This happens automatically since a current source scales its voltage in order to regulate the current. In real designs, of course, there is some allowable range of voltages achievable by , and hence circuits that use differential pairs, such as op amps and comparators, will have documented limits on the allowable common mode voltages.

This design is able to “steer” the current between the two sides of the differential pair. For example, if turns on more and takes a higher current, then Eq. implies that must take a proportionally lower current. An example scenario is shown in Figure 18.

The quiescent condition is:

Recall that bipolar transistors have an exponential current-voltage relationship , and small changes in can result in large changes in current. Hence, we observe that the differential pair is very sensitive to small voltage differences. We will show below that of input difference is enough to push basically all of the current onto a single side. The small signal regime for differential pairs is input differences less than .

Large signal analysis of bipolar differential pair

“Large signal” analysis means avoiding approximations, i.e., we must use the fundamental equations instead of the small signal models.

Consider the circuit shown in Figure 17. We begin our analysis of the differential pair by relating the input voltages to the emitter voltage. Let be the voltage at the emitters. Then

Subtracting these equations, we find

Since ,

Expanding the logarithms and simplifying,

Equation gives a crucial insight into the size of the voltage difference needed to steer the current from one side to the other. This equation is plotted in Figure 19. Notice how only a small voltage difference is needed to steer the current to either side.

Continuing the analysis, rearranging Eq. ,

Since we know , we can substitute to obtain

Also,

To determine the output voltages, use Ohm’s law to obtain

Therefore

A remarkable observation from Eq. is that has cancelled out. This tells us that any noise in will also be cancelled out. In reality, the cancellation will not be exactly perfect, but nevertheless, the design isolates the differential output from power supply ripple.

Substituting and ,

Equation is the final result. This expression shows the output voltage as a function of the differential input voltage.

Small signal approximation for bipolar differential pair

Equation yields an intuitive small signal approximation. Assuming , we approximate the function by the first term in its Taylor series approximation

to obtain the linear equation

Notice that is the quiescent current in each transistor, and therefore Hence we have

This expression is reminiscent of the small signal gain of a common emitter amplifier. It is valid when is small; a typical threshold is .

Example 4

Sketch the response of a differential pair to 1 mV and 100 mV peak-to-peak sine wave signals.

Solution

The 1 mV input can be considered as a small signal, and therefore the differential pair will linearly amplify the input according to Eq. . This is sketched in Figure 20. Notice that the output polarity is inverted. The common mode level of the input and output are not necessarily the same.

The 100 mV signal is very large and will readily saturate the output. Therefore, the question becomes to analyse minimum and maximum output voltages that the circuit can achieve.

Considering firstly the maximum level, we see that zero collector current will correspond to .

Next, the minimum level will occur when the current is at its maximum value , creating the largest voltage drop across . Therefore, the minimum output voltage is .

Based on this reasoning, the output will resemble a square wave, as shown in Figure 21.

FET differential pairs

Differential pairs can also be constructed using FETs, as shown in Figure 22. The analysis is similar to the bipolar case.

Self-Check Quiz 8

Further examining the LF411 op-amp (AoE Figure 4.43, p. 243), consider the operation of the input differential pair. Which of the following statements is true?

(a)

Raising the voltage of input + will steer more current into .

(b)

Raising the voltage of input + will steer less current into .

Check Start again

✔️ Correct!

You may find it interesting to look at the following LTSpice simulation of this differential pair (Figures 23 and 24).

You may wish to refer back to Figure 12 if you are not sure about the operation of a p-channel JFET.

Consider the reasoning:

1. A p-channel JFET pinches off for positive , with maximum current at . Therefore at quiescent conditions (equal current on each side), we expect positive and therefore the source voltage is lower than the gate voltage. The current source must drop enough voltage to push the source below the common mode of the input.
2. Higher means larger .
3. Consult Figure 12 to see what happens when you raise .